...Job Title - Senior Physical Design Engineer
~8+ years of industry experience
~ Good knowledge and hands on experience in Physical Design , timing and methodology which include logic synthesis, placement, clock t...
Job Description and Requirements
Senior STA Engineer
Responsibilities:
We are looking for STA Engineers with proven Signoff Static Timing Analysis skills who can independently signoff timing closure of a design. We are looking for dynamic, ...
...modifying STA constraints to check timing closure feasibility
.Experience in various clock implementation strategies (Multi-point CTS, Flex-H, Custom-CTS) for meeting block level and full chip level latency and s...
...designs.
.Experience in minimum one of the Full Chip Chip Integration activities such as Full Chip Floor Planning, Power Planning , Bus Planning, Full Chip timing, Full Chip Reliability and Full Chip Physical Ver...
...full chip testbenches.
Work with architects, designers, and pre-silicon verification teams to accomplish your tasks.
Build reusable bus functional models, traffic generators, monitors, checkers and scoreboards...
Diagnose, troubleshoot, and repair devices. Provide recommendations for problem resolution
Explain complex technical issues to customers in a non-technical, simple to understand manner
Provide repair and replacement estimates to customers
...
Job Role : Physical Design Engineer/Lead
Experience : 4-15 years
Location : Bangalore
Requirements:
· Experience in Timing Closure/ECOs on block level and chip level in a highly complex clocking environment
· Good knowled...
.... Applied Materials is the leader in materials engineering solutions used to
produce virtually every new chip and advanced display in... ...innovations make possible the technology shaping...
