ASIC Digital Design Engineer, Design Lead
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Interne...
We are looking for Senior ASIC Digital Design Engineer to join Synopsys Solutions Group, Digital IP Subsystems Team
Come and be part of a collaborative team environment that innovates and develops the latest DesignWare IP Subsystem solutions th...
As a
Lead Verification Engineer , you will be responsible for signing off on Subsystems Verification, working closely with the Design leads, Architect the test bench, author & Sign-off on the Test Plan, test environment, driving the life-cycle of ...
Position Description:
EXP- 7- 12 yrs
Functional Verification Engineer for DDR Memory Controller and PHY IP development team.
The role would include functional verification of the DDR Memory Controller and PHY IP solution of Cadence.
The work invol...
...level is a plus
Responsibilities:
Lead a highly motivated verification team responsible for DV for IPs like UCIe, HBM, PCIe, Bus logic etc. (Senior RTL Verification Lead)
Implement advanced verification ...
...functional verification of High Speed interface IPs. A dynamic personality with eager to learn, drive Pre-silicon verification activities,... ...assertions, random test generators, high level...
...and deploying the tools
Evaluate and recommend EDA solutions for formal verification
provide training for internal teams and mentoring engineer related to formal verification Technology.
Mandatory skills :F...
...Low Power Verification or Modem domain, debug skills, DV Integration are preferred.
4.Preferably with exposure to Power Aware/GLS, RISC-V processor
5. Protocols experience - PCIe/CXL/UCIe/DDR/Ethernet
6. In addit...
ASIC Digital Design Engineer, Design Lead
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These b...
