...Job Description and Requirements
Does this sound like a good role for you
You will be part of a strong development team in the area of GPIOs , Speciality IOs and General Purpose Analog IPs. You will develop ...
...capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we're at the heart of the innova...
Attention Analog Layout Engineers! Elevate your career to new heights with us! Discover your next exciting chapter and embark on a journey filled with boundless opportunities for advancement and achievement. Join our team now and unleash your full po...
Job Description and Requirements
We're looking for ESD Design Engineer
Does this sound like a good role for you
You will be part of a strong development team in the area of GPIOs , Speciality IOs and General Purpose Analog IPs. You will dev...
...capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
At Synopsys, we’re at the heart of the innova...
Imaging Design Group Manager
.Lead & manage the Noida Imaging competence centre (Analog, Digital, Verification, Firmware and Validation)
.Lead & manage the Noida project execution and across disciplines above -
.Ens...
...expertise. Someone who is currently handling a team of 15 people in his/her organization could be a good fit for this position.
The Design group in Noida is composed of 5 entities: Analog, Digital, firmware, veri...
...Synopsys is seeking a creative, enthusiastic and talented engineer to fill a full timeR&D position in NOIDA NCR. We are looking... ...innovations that change the way we work and play. Self-dr...
Job Description and Requirements
Looking for innovative out of the box thinking Layout Engineer to be part of the Analog and Mixed Signal IP Methodology Team at Synopsys. In this role you will beresponsible for developing and maintaining layout ...
1. Proficient in Verilog coding and RTL design, data path designs, 2. Knowledge of RTL checks ex- LINT, SDC, CDC
3. Familiar with synthesis flow and timing constraints
4. Experience in writing Verilog testbench and running simulations.
5. Desir...
