Title: Physical Verification
Location: Bangalore, Hyderabad
Description:
[( 7nm and below exposure, preferred 3nm)]
Own physical convergence(DRC/LVS/ERC/softcheck/ ESD/PERC ) closure of a complex subsystem in PnR and calibre...
* Candidate should be having a Bachelors degree in electrical engineering with minimum 8 years of experience in Physical Verification * Hands on debugging skills in different physical verification checks like LVSDRCERCPERC Antenna ESD and DFM using C...
REQUIREMENTS:
∙ 5-7 years of experience in ASIC Physical Design
∙ Have good knowledge of entire physical design process from floorplan till GDS generation
∙ Good Exposure to Physical Verification Process
∙ Have hands...
Bangalore
Quess IT Staffing (Formerly known as Magna Infotech)
About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive's unr...
...Looking for an enthusiastic Physical Design Engineer with a passion for creating impactful software solutions
Job Title: Physical Design Engineer
Experience: 8+ Years
Location: Bangalore
Notice Period: I...
Experience: 5 to 15years Job location: Bangalore
Role:
As a Physical Design Electrical Analysis Engineer, you will be driving the electrical analysis and closure at block as well as top level.
Roles and Responsibil...
....
~ Evaluate low power techniques and power reduction opportunities
~ Perform clock distribution design and analysis
~ Perform Physical verification activities at fullchip level.
~ Drive technical activities...
...off flow: STA, DRC/LVS/Antenna/ERC, Power analysis, IR/EM analysis, LEC, ECO (Timing and Functional)Have in-depth knowledge of entire physical design process from RTL to GDS2 generation which includes floorplan, Pla...
...languages, and experience with PNR tools.
Responsibilities:
Provide IR (PDN) support for designs executed by the CAD team.
Assist the team in various activities related to IR tool qualification, design su...
