...Python).
Good team player. Need to interact with the designers and other verification engineers proactively.
Prior experience with video pipeline is added advantage.
Knowledge of tensilica
Worked with su...
Job Description
Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group Hardware Engineering
General Summary:
Minimum of 8+ years experience in the area of ASIC/DFT
-In depth knowledge of DFT conc...
...python.
Job Description: Good knowledge on CMOS technology and physical design concepts on flooplanning, place and route , CTS,... ...hiring process, please call Qualcomm's toll-free numbe...
...Job Description
Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group Hardware Engineering
General Summary:
~5-10 years of hardware experience involving design and...
...Python).
Good team player. Need to interact with the designers and other verification engineers proactively.
Prior experience with video pipeline is added advantage.
Knowledge of tensilica
Worked with su...
...processes and procedures to improve overall performance of technical staff.
Identify areas for continuous improvement and efficiency in delivery of services.
Take responsibility for follow-up services or probl...
...Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group Hardware Engineering
General Summary... ...verification .
Strong in System Verilog, UVM,...
...SoC validation on emulation and post silicon platforms.
In depth knowledge of one or more peripheral protocols and specifications: CIO, USB2.0/3.0/3.1, PCIe Gen1/2/3/4, Ethernet, SATA, SD/eMMC, QUPv3, NAND, SPI, ...
...Engineering Group Systems Engineering
General Summary:
Responsible for deep learning compiler frameworks for Adreno AI accelerator.
Research, optimize and improve the compiler framework using hardware speci...
Job Description
Company:
Qualcomm India Private Limited
Job Area:
Engineering Services Group, Engineering Services Group Layout Engineer
General Summary:
Develops block, macro, or chip level layouts and floorplans according to pr...
