Job Description and Requirements
Synopsys, a leading technology company in the semiconductor industry, is seeking a highly skilled and experienced Staff A&MS Layout Design Engineer to join our dynamic team. As a Staff A&MS Layout Design Engine...
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Senior Software Engineer
JOB TYPE: W2, Contract, Hybrid
LOCATION: KANATA, ON
JOB SUMMARY FOR Senior Software Engineer:
We are looking for an Android HMI developer with an emphasis on the application (Kotlin) layer and some experience wi...
Software Engineer posted 16 hours ago
JOB TYPE: W2, Hybrid
LOCATION: KANATA, ON
JOB SUMMARY FOR Software Engineer:
We are seeking to hire a person with embedded software development expertise. This team develops control algorithms and p...
Job Description and Requirements
Seeking a highly motivated and innovative mixed signal AMS co-simulation verification engineer with strong theoretical and practical background in high-speed data recovery circuits. Working as part of a highly e...
Job Description and Requirements
Cosim Engineer
Seeking a motivated and innovative mixed signal AMS co-simulation verification engineer with strong theoretical and practical background in high-speed data recovery circuits. Working as part of a...
Job Description and Requirements
Analog Design, Staff Engineer
In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a growing analog and mixed signal R&D team developing...
Job Description and Requirements
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the E...
Job Description and Requirements
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and e...
Staff Digital Verification Engineer
Job Description and Requirements
Staff Digital Verification Engineer
Responsibilities
Define verification plans and build verification environments for IP level designs using System Verilog with UVM.
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