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Custom Circuit Pathfinding Lead


Apple Inc.


Location

Cupertino, CA | United States


Job description

Do you have a passion for crafting entirely new solutions? As part of our Digital group, you’ll take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Your efforts will be groundbreaking, often literally. Join us, and you’ll help design the tools that allow us to bring customers experiences they’ve never-before envisioned! You will be part of an exciting silicon design group that is responsible for designing pioneering ASICs. We have an extraordinary opportunity for Circuits Engineers to design advanced custom digital megacells (SRAM memories, on-chip sensors, ML accelerators data path) used in a high performance / low power SOC.

Key Qualifications

Description

Imagine yourself at the center of our SOC design effort, collaborating with all fields, with a critical impact and playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come up with new ideas, as well as work with a team of hardworking engineers. You will perform the following: • Lead the custom digital / memory path finding activities with collaboration between technology/ circuit design and product design teams. • Work with multidisciplinary teams (technology, chip design, platform architecture) to propose and design new circuits and technologies that improve the overall chip PPA. • Perform feasibility analysis and implement new custom circuits to improve chip power efficiency. Build test chips to evaluate the implementations. • Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation / margin verification across PVT, statistical design, functional verification and silicon bring up • Work closely with layout team to complete the design and oversee the layout quality • Develop modeling strategies of new emerging memory components from transistor level to systems behavior. • Develop statistical models for new memory bitcells and implement solutions to improve the reliability and system level impact

Education & Experience

BS and a minimum of 3 years of relevant industry experience

Additional Requirements

Pay & Benefits

Imagine yourself at the center of our SOC design effort, collaborating with all fields, with a critical impact and playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come up with new ideas, as well as work with a team of hardworking engineers. You will perform the following: • Lead the custom digital / memory path finding activities with collaboration between technology/ circuit design and product design teams. • Work with multidisciplinary teams (technology, chip design, platform architecture) to propose and design new circuits and technologies that improve the overall chip PPA. • Perform feasibility analysis and implement new custom circuits to improve chip power efficiency. Build test chips to evaluate the implementations. • Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation / margin verification across PVT, statistical design, functional verification and silicon bring up • Work closely with layout team to complete the design and oversee the layout quality • Develop modeling strategies of new emerging memory components from transistor level to systems behavior. • Develop statistical models for new memory bitcells and implement solutions to improve the reliability and system level impact BS and a minimum of 3 years of relevant industry experience


Job tags

Relocation


Salary

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