Formal Verification Engineer
Location
Cupertino, CA | United States
Job description
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products powered by Apple Silicon. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Learn from the best Formal Verification team in the world and acquire experience being at the center of a System-on-a-chip (SoC) design verification effort collaborating with design. Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly, and we are hiring all levels from junior to senior roles.
Key Qualifications
- Hands on experience with VLSI and digital logic design and verification techniques or formal methods and their application to hardware, software, or systems
- Interest in learning and becoming an expert in SoC, CPU, GPU, or Cellular designs
- Detail oriented approach and desire to overcome challenges is required.
Description
As a formal verification engineer working the complete formal verification for single or multiple design blocks and IPs (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be:
- Working with Apple Silicon's world-class design engineers to develop a formal micro-architecture specification.
- Formalizing the refinement from architecture to micro-Architecture.
- Developing comprehensive formal verification test plan. Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.
- Crafting novel and creative solutions for verifying complex design micro-architectures.
- Developing and implementing re-usable and optimized formal models and verification code base.
- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.
Education & Experience
Minimum requirement of a bachelors degree.
Additional Requirements
- PREFERRED QUALIFICATIONS
- - Formal Method or Formal Verification technologies experience and abstraction techniques
- - Knowledge and experience in interpreting hardware specifications and using
- - Temporal logic assertion-based languages such as SVA or PSL
- - Experience in using EDA formal tools and tool development experience is a plus
- - Proficiency in any scripting language with excellent debugging skills
- - Extraordinary teammate with excellent interpersonal skills
- - Passionate about developing world-class/innovative formal verification solutions
- - Exposure to CPU instruction-set architectures, memory consistency or cache coherence principles
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $55.82 and $84.09/hr, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
As a formal verification engineer working the complete formal verification for single or multiple design blocks and IPs (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be:
- Working with Apple Silicon's world-class design engineers to develop a formal micro-architecture specification.
- Formalizing the refinement from architecture to micro-Architecture.
- Developing comprehensive formal verification test plan. Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.
- Crafting novel and creative solutions for verifying complex design micro-architectures.
- Developing and implementing re-usable and optimized formal models and verification code base.
- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity. Minimum requirement of a bachelors degree.
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