Lattice Semiconductor
Location
San Jose, CA | United States
Job description
Physical synthesis is an important design step in FPGA design flow. It can help the user to improve the timing result for their designs.Lattice Semiconductor is seeking a summer intern in 2024 to join the design implementation team focused on implementing and testing the new developed physical synthesis features. This position is an opportunity to be part of a dynamic team with opportunity to contribute, learn and grow. Accountabilities: Test physical synthesis flow; Test new developed physical synthesis features; Implement one or two features; Required Skills: Candidates of BS or MS in Electrical Engineering or Computer Science; Proficient with C/C++ and shell scripts The base pay for this role is between $23 to $53 per hour.
Job tags
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