Custom Circuit RTL Design Engineer
Location
Cupertino, CA | United States
Job description
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.
Do you have a passion for crafting entirely new solutions? As part of our Digital Design Engineering group, youʼll take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world! Your efforts will be groundbreaking, often literally. Join us, and youʼll help design the tools that allow us to bring customers experiences they have never-before envisioned. You will be part of an exciting silicon design group that is responsible for designing pioneering ASICs. In this role as a Custom Circuit RTL/DV Methodology engineer, you will be working with the custom circuits team to lead methodology enhancements for RTL models of advanced custom digital circuits, and improve verification techniques that will enable bug-free first silicon for all the Digital custom IPs we deliver to the many SoCs that Apple produces. You will be at the heart of a processor design effort, making a critical impact delivering products to market quickly.
Key Qualifications
- In-depth knowledge of digital design, behavioral (including emulation-friendly) and structural RTL coding especially as it pertains to SRAM and register file design
- Knowledge of Verilog, System Verilog and experience with industry standard simulators and waveform debugging tools
- Knowledge of regression and revision control tools, and scripting language (python / perl)
- DV skills including, but not limited to UVM, developing testplans, testbenches, coverage monitors for functional, code coverage, assertion verification
- Basic knowledge of viewing and understanding custom circuit schematics
- Knowledge of custom circuit and SRAM design and DFT (ATPG/MBIST) is desirable.
Description
In this highly visible role as a Custom Circuits RTL/DV Methodology Engineer, you will be at the center of a SoC design effort collaborating with all teams, with a critical impact on getting bug-free functional products to market quickly. This requires you to work closely with the circuit design team to review design and architecture specifications and with various design teams across the SoC partitions to understand the use cases and corner conditions to develop test plans. Furthermore, you will be required to develop the methodology for test benches and coverage monitors for functional coverage and assertions. You will also work on improving the RTL methodology as applicable to simulation and emulation scenarios.
You will have the responsibilities as follows:
- Understanding of the design specifications of the IPs and work with teams across the SoC where these IPs are used to understand all the use cases an corner conditions.
- Methodology for IP RTL development as it pertains to SRAM and register file design, including design for FPGA/emulation
- DV methodology on test plans, test bench creation and coverage monitors for functional, code coverage and assertions verification.
- Leverage automation to enable improvements on both RTL and DV front at scale across various IP designs.
Education & Experience
BS and a minimum of 10 years of relevant industry experience
Additional Requirements
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $160,700.00 and $282,500.00, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
In this highly visible role as a Custom Circuits RTL/DV Methodology Engineer, you will be at the center of a SoC design effort collaborating with all teams, with a critical impact on getting bug-free functional products to market quickly. This requires you to work closely with the circuit design team to review design and architecture specifications and with various design teams across the SoC partitions to understand the use cases and corner conditions to develop test plans. Furthermore, you will be required to develop the methodology for test benches and coverage monitors for functional coverage and assertions. You will also work on improving the RTL methodology as applicable to simulation and emulation scenarios.
You will have the responsibilities as follows:
- Understanding of the design specifications of the IPs and work with teams across the SoC where these IPs are used to understand all the use cases an corner conditions.
- Methodology for IP RTL development as it pertains to SRAM and register file design, including design for FPGA/emulation
- DV methodology on test plans, test bench creation and coverage monitors for functional, code coverage and assertions verification.
- Leverage automation to enable improvements on both RTL and DV front at scale across various IP designs. BS and a minimum of 10 years of relevant industry experience
Job tags
Salary
