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Formal Verification Technical Lead


Apple Inc.


Location

St Albans, Hertfordshire | United Kingdom


Job description

Saint Albans , Hertfordshire , United Kingdom

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here.The people who work here have reinvented entire industries with all Apple Hardware products powered by Apple Silicon.The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product.Do you have experience leading a System-on-a-chip (SoC) design verification effort collaborating with design? Are you passionate about changing the world?We have a critical impact on getting high quality functional products to millions of customers quickly and we are looking for an experienced Formal Verification Technical Lead to join our UK team.

Key Qualifications

Description

As a formal verification technical lead you'll work to identify targets and complete formal verification for single or multiple design blocks and IP’s (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be responsible for:- Working with Apple's world-classP design engineers to develop a formal micro-architecture specification.- Formalizing the refinement from architecture to micro-architecture.- Developing comprehensive formal verification test plan.- Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.- Crafting novel and creative solutions for verifying complex design micro-architectures.- Developing and implementing re-usable and optimized formal models and verification code base.- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.

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