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Physical Design Engineer - Static Timing Analysis


Etaash Consultants


Location

Mysore | India


Job description

Physical Design Engineer : ( Individual Contributor Role ) : Total Experience : 8+ YearsPls note : candidate must have experience in Innovus Tool Responsibilities :- Perform physical design of integrated circuits using advanced design tools and methodologies- Develop and implement floorplans that optimize for timing, power, and area- Perform static timing analysis (STA) and ensure timing closure- Create and optimize clock trees- Place and route the design with strict adherence to design rules and constraints- Perform physical verification (DRC/LVS)- Collaborate with logic designers, circuit designers, and other engineers to ensure design integration and functionality- Stay up-to-date on the latest physical design technologies and trendsQualifications :- Bachelor's degree in Electrical Engineering or Computer Science, Master's degree preferred- Minimum 5 years of experience in physical design of integrated circuits- Proven experience with less than 10 nm technology nodes- Expertise in STA tools and methodologies, such as Synopsys PrimeTime & Innovus Tool- Experience with synthesis tools, such as Synopsys Design Compiler- Strong analytical and problem-solving skills- Excellent communication and teamwork skills- Ability to work independently and take ownership of projects (ref:hirist.tech)


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