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Location

Bangalore | India

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Job description

Exciting Opportunity for Senior RTL Design Engineer

Are you a seasoned professional with over 3 years of experience in RTL Design? We're looking for a dynamic and skilled individual to join our team!

Responsibilities include designing, developing, and testing RTL designs, as well as debugging and troubleshooting. Sound knowledge of RTL coding using Verilog and System Verilog. Minimum BE/BS degree in Electrical/Electronics/Computer science required. Logic design and RTL

coding experience with sound knowledge on verification and implementation concepts Experience in networking ASIC architecture, micro-architecture development,

design

and debug Ability to code readable, maintainable, verifiable and synthesizable logic in Verilog and/or SystemVerilog Experience with synthesis,

CDC, STA, formality, ECO process , tool flows and scripting Any knowledge of Lint/Synthesis/CDC/RDC etc. is a plus.

Kindy share me the updated resume to [email protected]

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Salary