Sintegra Inc.
Location
Bangalore | India
Job description
Looking for Block Level Physical Design/ Verification for a 3nm/5nm. Available to start in Two Weeks The candidate will be executing P&R tools on a high-speed digital semi-custom layout
Candidate will assist the DE Leads in executing structural design including Synthesis runs, P&R, APR, Performance Verification involving static timing analysis, FEV and layout verification. Required Skills: ASIC and SoC design experience, Physical design CAD flows and Design convergence. Includes synthesis, APR, STA, LVS and debug.Job tags
Salary