Senior Manager / Director, Design Verification

Location

Pune | India

Job description

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Summary:

L attice is seeking candidates for the position of Senior Manager or Director , Design Verification . This position gives you an opportunity to be a part of one of the most cutting edge and key projects that Lattice’s R&D team has embarked upon to date. As part of our team, you will have the opportunity to take the lead on and contribute to verifying complex FPGAs. This position requires someone comfortable in all areas of FPGA design verification. Someone that thrives in a dynamic multi-functional organization and is not afraid to take on challenges and solve complex problems using state of the art methodologies.

Accountabilities :

• Serve as the one of key leader in the Design Verification (DV) team and represent Pune on the DV leadership team.
• Drive DV s t rategy for Pune including building out the team; developing key DV capabilities; and most importantly, forming a collaborative, cohesive, and highly performant culture: Lattice Pune, from day one, must be a truly great place to work.
• Assume full ownership for FPGA design verification in Pune, and assume stewardship for design verification tasks in Pune. Drive a quality and execution mindset throughout the organization.
• Adopt design verification flows and methodologies from established sites as “copy-exact,” but be willing to drive improvements and fixes as opportunities arise.
• Develop strong relationships with teams in Lattice Shanghai, Lattice San Jose, Lattice Penang, and Lattice Manila to enable work styles including:
  • Supporting FPGA programs at other sites.
  • As needs require, either handing off or picking up programs across sites.
• Mentor and develop a strong team.
• Willingness to travel to worldwide sites occasionally and as needed.

Required Skills:

• BS/MS/PhD Electrical Engineering, Computer Science, Computer Systems Engineering, or equivalent degree.
• 20+ years of experience leading teams to tape out commercial silicon chips, managing team schedules and deliverables, and meeting product milestones.
• Embraces and thrives in ambiguity, changing priorities.
• Familiar with FPGA designs, use-cases, and design verification considerations.
• Familiar with SOC designs, use-cases, and design verification considerations.
• Independent worker with demonstrated problem-solving abilities.
• Proven ability to work with multiple groups across different sites and timezones.

Job tags

Salary