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Principal Product Validation Engineer


Alp Consulting Ltd.


Location

Noida | India


Job description

Job Responsibilities & Skills: (Design Verification Engineer) The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with System Verilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required.

Must have solid experience on any of the protocols like Ethernet, PCIe, DDR, USB3/4, DisplayPort (DP), MIPI, UCIe, NVMe, HDMI.

Qualifications Minimal qualification requires B. Tech or M. Tech/B.E./M.E. with 10+ years of experience in relevant experience.

Behavioural skills required. Must possess strong written, verbal and presentation skills. Ability to establish a close working relationship with both customer peers and management. Explore what’s possible to get the job done, including creative use of unconventional solutions. Work effectively across functions and geographies. Push to raise the bar while always operating with integrity.


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