Senior Staff Engineer - DV
Analog Devices, Inc. (ADI)
Location
Bangalore | India
Job description
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today's innovators stay Ahead of What's Possible.
We are seeking to fill a senior verification engineer position for the Processors Business Unit at Analog Devices. In this position the successful candidate will be exposed to the entire product life cycle from concept phase, through design, verification, implementation, and release of products to customers.
Responsibilities
- Verification of complex mixed signal designs and sub-systems using leading edge verification methodologies.
- Architecting a unified verification testbench environment supporting both digital only and mixed signal verification requirements (UVM based)
- Defining test plans, tests, and verification methodology for block / chip-level verification. Working with the design team in generating test-plans and closure of code and functional coverage
- Continuous interaction with digital, analog mixed signal and firmware teams
- Supporting post-silicon verification activities of the products working with design, product evaluation and applications engineering teams.
- Constantly thrive for design verification improvements
- Technically mentoring less-experienced verification engineers.
Qualifications
- Bachelor's or Master's degree, in Engineering (Electronic Engineering) or equivalent.
- 7+ years ASIC design, verification, or related work experience.
Additional Relevant Experience
- Leadership skills enabling one to define and implement a verification strategy.
- Demonstrated ability to communicate with peers, managers, and project stakeholders effectively using both verbal and written communications.
- Expert in developing unit and SoC level test benches using UVM, System Verilog
- Strong knowledge of test-plan generation, coverage analysis transaction level modeling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog
- Knowledge of analog mixed signal design verification flow.
- Working knowledge of standard processors and microcontrollers.
- Gate Level Simulation (GLS) verification flow for SoC verification.
- Pre- and post-silicon verification test flow including HW, SW and FW
- Verilog, C/C++, System C, Java, TCL/Perl/Python/shell-scripting
- Good to have RTL design/front-end design/FPGA flow experience.
- Some experience in MATLAB (including for co-simulation and HDL generation) and digital signal processing.
- Low power methodologies such as CPF/UPF
- Some experience with Functional Safety requirements
- Strong interpersonal and teamwork skills with demonstrated ability to build and motivate a team.
- Be self-motivated and enthusiastic.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
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