Signal and Power Integrity Engineer
Location
Bangalore | India
Job description
Job Description
- This job opportunity in IPG will be part of IP engineering group which is responsible for design and development of industry leading SERDES IP's.
- Strong exposure to Redhawk EM/IR analysis, CPM CMM models generation, Physical design and constraints understanding.
- Independently lead power integrity design for highs speed SERDES IP's and provide solution space for on-die, package and PCB power integrity design.
- Work independently with physical design team and circuit design teams for on-die power integrity.
- Performs metal grid extraction, CPM models generation using Redhawk or equivalent tool for system simulation, MIM optimization, and layout optimization.
- Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon.
- Perform time domain analysis in HSPICE, ADS to find noise levels in I/O rails.
- Provides guidance, solution space on implementation with the design team (IP, SOC, Package and board).
- Interface with customers and in-house IP, SOC and platform teams to provide the power delivery solution to meet the Specification.
Qualifications
Minimum Qualifications:
- Bachelor of Engineering or a Master degree of Science/Engineering in the field of Electronics/VLSI.
- Must have minimum 10-18 years of hands on experience with EM/IR analysis, in-rush-current/powerup analysis and Electromigration analysis, package power integrity and board level power integrity, HSPICE simulations.
- Experience with on-die power delivery and packaging solutions for high speed IP's and SoC products.
Preferred qualifications:
- Design experience of Buck-boost converters, LDOs, and PCB power supply.
- Experience with transmission line theory and electromagnetic field concepts.
- Experience with Printed Circuit Boards (PCB) and Packaging Technology.
- Experience with either of the following tools: High-speed design tools and 3D extraction tools (i.e, Ansoft Q3D, HFSS, ADS, POWERSI/DC).
Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances the work model may change to accommodate business needs.
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