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Location

Bangalore | India

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Job description

We re looking for Physical Design Specialists in the role of Staff Application Engineer. Does this sound like a good role for you

In this role you would be :

• The primary focus of the Physical Design Specialist (PDS) is to support the sale and adoption of Synopsys products to help customers achieve tangible and lasting performance improvements in the cost, quality, and development time for projects. PDS are expected to possess Place Route (physical) ,
• Synthesis (logical and physical), STA experience and knowledge. PDS AEs are expected to be knowledgeable in multiple domains of design implementation and understand codependency of flow and methodology such as Macro Standard Cell Placement, Clock Tree Synthesis, Routing, Advanced Timing Optimization techniques . Additional knowledge of RTL Coding, Synthesis, Equivalency check, Constraints (timing Power) is preferable.

• In addition, PDS AEs will articulate design methodologies involving Synopsys tools at a very advanced Node (Sub 5nm) using Synopsys Full RTL-to-GDSII solution (Fusion Compiler / IC Compiler II). Development time will be spent gaining expertise in additional, or specialization tools, broadening focus from product emphasis to methodology, sharpening Account Management skills, and learning to leverage success.

• PDS AEs are expected to manage multiple customer activities concurrently, and work with Account Managers and AE management to set their priorities.
• Sales support roles include product demonstrations, evaluations, and competitive benchmarking. Customer support roles include training, problem resolution, and technical account management. PDS AEs must be able to interact effectively with end-users at customer sites, as well as managers.
• PDS AEs also participate in account planning, where they work as part of the account team to develop the Synopsys solution to customer problems by bringing their understanding of customers needs and issues.

• PDS AE s are expected to manage a small team of junior AE s through direct or indirect reporting. Technical feasibility assessment , assigning tasks to junior AEs and delivering larger business goals through technical collaboration with all stake holders

Key Qualifications:

• Passion for innovative solutions , exposure to cutting edge technology and positive approach to customer challenges
• Design experience should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing)
• RTL to GDSII full flow experience or knowledge is preferable
• Strong interest and understanding of Advanced Node Design methodologies are required.
• Deep Synopsys Back end tool (Logical and Physical Synthesis, Timing Closure techniques, Macro Placement, Routing at advanced Node , Static Timing Analysis, including noise analysis) experience and knowledge are required.
• Excellent verbal and written presentation/communication skills are mandatory.
• Customer sensitivity, the ability to multiplex many issues set priorities, and the desire to help customers exploit new technologies are essential for success in the position.

Preferred Experience:

• BE/B.Tech/BS/MS/M.Tech or equivalent, required with 10+ years of experience
• Tool knowledge expected: Back end PR tools ( Fusion Compiler, ICC2 OR Industry standard PR tools )
• Tool knowledge (preferred) : front end Synthesis tools (Fusion Compiler, Design Compiler OR Industry standard synthesis tools),
• Tool knowledge (preferred): STA (Primetime),

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