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Analog Design Engineer / Principal Engineer


Cyient


Location

Bangalore | India


Job description

Job Description Experience:4+ years Skill Set Requirements:

Candidate should be able to lead, own development of Analog I/P focused on clocks. Able to mentor and lead a small team to design clock IP from specification to silicon qualification. Candidate must have cross domain expertise , should have ability to under stand system level spec and derive the corresponding IP level specification from it . Should have expertise in the exploration and development of new architecture, and silicon debug. MUST have Good understanding on analog fundamentals. Ability to solve problems, architecture development, silicon debug of complex clock system like precision oscillator ( RC , crystal) ,PLL, DLL, precision comparator, reference network , Regulators, signal chains. Experience in supporting the IP silicon qualification, and silicon debug. Good to have Designing Exposure on switching converter designs. Patents or published papers on clock related I/Ps.


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