Vintronics Consulting
Location
Bangalore | India
Job description
- Interview Process: 1 virtual round with Encora; then 2 face-to-face rounds with - Interview include live coding tests in an online compiler for "Perl or Python or Tcl"etc.Job Description :No. of positions : 2Exp. : 7+ yrs.Edu. Quali. : B.Tech or M.Tech or Phd As a Physical Design Engineer, you will work with microarchitecture, RTL design and CAD teams to implement the designs meeting aggressive power, area and performance goals using industry standard tools/flows.Tools :ICC/Innovus, PT, StarRC, Redhawk, calibre DRC/LVSScripting :TCL, perl Roles and Responsibilities :- Perform block level implementation using place and route techniques to meet area/timing and power requirements- Create floorplan with pin placement, partitions and power grid- Generate block level static timing constraints- Perform Synthesis, Place & Route on the designs using industry standard tools and deliver GDS- Validate the designs for functional and electrical robustness- Generate and implement ECOs to fix noise, timing and EM/IR violations- Involve in defining correct by construction physical design methodologies.- Preferably experience in 10nm process of lesser.Skills : - Physical design of block level with full understanding of PnR cycle.- Good hands-on experience on industry standard pnr tools like ICC2/Innovus- Good understanding on signoff tool like Prime time , Redhawk and calibre- Should be able to guide junior engineers in resolving technical issues.- Experience in developing and implementing power grid and clock specifications- Experience in all aspects of timing closure for multi-clock domain designs- Experience in deep submicron process technology nodes is strongly preferred- Knowledge of library cells and optimizations- Solid understanding industry standard tools for synthesis, place & route and tapeout flows- Solid understanding of physical design verification methods to debug LVS/DRC. - Experience with Synthesis, place and route and signoff timing/power analysis- Knowledge of all aspects of physical construction, integration, physical and electrical verification - Knowledge of basic SoC architecture and HDL languages like Verilog. (ref:hirist.tech)
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