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Location

Bangalore | India

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Job description

Responsibilities: The ideal candidate will be required to work on both

#IP

#development

and integration into SoCs catering to various markets and tech nodes. Job will involve RTL design, front end tools flow and

#SoC

#integration / porting related tasks.

Requirements: · 8+ years of Experience · Engineering experience with exposure to front end

#ASIC

tool flows · Should be self-driven and independent in tracking and closing tasks with respective owners · In depth knowledge of

#AHB

and bus infrastructures like matrix and fabrics · Good understanding of

#ARM

based SoC Architecture · Exposure to ARM Cortex A/M integration or support · Good understanding of SoC DV methodology · Good experience in

#LowPowerdesign

methodology · Hands-on experience with ASIC tools

#Lint ,

#CDC

etc · System Verilog/Verilog RTL coding Power aware RTL coding/design knowledge · Understanding of Clock-Structures/Scheme Good Communication Skills

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Job tags

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Salary