Microchip Technology
Location
Bangalore | India
Job description
We are seeking a highly motivated Synthesis and STA Engineer to join our team.
The successful candidate will be responsible for performing Synthesis and STA timing closure for our cutting-edge microchip designs.
The ideal candidate will have a strong background in Synthesis STA and experience with industry-standard EDA tools.
Responsibilities:
-Perform Synthesis and STA timing closure for multi-million hierarchical complex microchip designs.
-Lead and drive team members to complete Implementation activities.
-Complete timing closure for blocks top level in advanced nodes.
-Develop constraints and perform post-layout timing closure.
-Perform CLP and LEC for both full chip and block level.
-Experience on UPF/CPF would be an added advantage.
-Collaborate with cross-functional teams to ensure timely delivery of high-quality designs.
-Optimize design performance through timing closure and power optimization.
-Develop and maintain design constraints and timing models.
-Analyze and debug timing issues.
-Inserting DFT logic for both block and top level.
Requirements/Qualifications:
-Bachelors or master s degree in electronics engineering or related field
-8+ years of experience in Synthesis STA
-Experience with industry-standard EDA tools such as Synopsys, Cadence, and Mentor Graphics like Genus, DC compiler, Tempus, Primetime.
-Strong understanding of timing closure and power optimization techniques
-Excellent analytical and problem-solving skills
-Strong communication and collaboration skills
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