Staff Engineer, Packaging Engineering

Location

Bangalore | India

Job description

The SI engineer will be an individual contributor and should be able to perform SI extraction specific for Package level and able to prove that the package is capable of meeting the target SI requirement for the Package.

• The target candidate should have proficient and interest to learn and handled the below
• Analyzing/designing High speed I/O packages for PCI-E Gen3/Gen4, 28+G SerDes, DDR4, NAND flash.
• Performing High Speed interconnect analysis based on the package behavioral model.
• Working knowledge of system level power integrity and budgeting (DC, AC, transient analysis).
• Power Integrity analysis for package design and to provide decoupling requirements at the chip, package and PCB level.
• Interacting with internal engineering departments, vendors and customers to develop high performance package and PCBs
• Development of IBIS generation flow for high-speed IOs as well as device.
• Defining optimal layer PCB stackup & PWR/GND.
• High frequency measurement and characterization of passive and active elements at the die and board level.
• Frequency domain impedance analysis - package, bare board & with decoupling capacitors.
• Ability to provide design guidelines to Layout team to meet the Package SI requirements and suggest improvements in the layout based on the observed values after extraction
• Knowledge of Package signal integrity and power integrity principles is required. Knowledge of EMI, HFSS, HSPICE is a plus. Hands-on experience with oscilloscopes, network analyzers and spectrum analyzers also a plus.
• Practical skill in AutoCAD, Cadence APD, Finite Element Analysis, Design of Experiments, statistical techniques and package failure analysis techniques required.
• Ability to daily multi-tasking in different projects, manage and meet tight deadlines of packaging deliverables as a part of multidisciplinary team as well as excellent communication and interpersonal skills required.

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