Location
Bangalore | India
Job description
Job Details: Job Description: The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people's digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, come join us to do something wonderful. Your responsibilities will include, but not limited to: Own (define, maintain, and update) the generation and validation flows for standard cell physical design collaterals: NDM, LEF, Milkyway, OASIS, OALIB, etc. Understand layout design rules. Understand the standard cell layout specs and architecture. Work with customers on physical design collateral/enhancements/optimizations for routability across SNPS and CDNS APR tools. Perform technology runset evaluations and compile change list (aka XOR) data. Understand and validate PDK collaterals. Understand layout and block level requirements. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications: Candidate must have a BS degree with+ years of experience or MS degree with 3+ years of experience or PhD degree with 1+ years of experience in Electronics Engineering or related field.
4+ years of experience in the following:
- VLSI design.
- Standard cell library design.
- Digital circuit design, including CMOS combinatorial logic and sequential element design and layout.
Preferred Qualifications:
4+ years of experience in the following:
- Device physics and FinFet characteristics.
- Experience using industry-standard design automation tools in one or more of the areas: circuit simulation, std cell characterization, synthesis, place and route, physical design verification and reliability verification.
- Scripting (TCL, Per+l, Python, ML) for design automation.
- Linux environment and its development tools.Job Type:Experienced HireShift:Shift 1 (India)Primary Location: India, BangaloreAdditional Locations:Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.Job tags
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