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SOC Architect


ON Semiconductor


Location

Bangalore | India


Job description

(1) developing understanding of the requirements for a product capable of supporting Standards such as ASA motion Link, MIPI A-PHY etc.,

(2) developing SoC architectural specifications

3) developing FPGA prototype architectural specifications - the prototype platform will be used to validate and evaluate end to end PHY performance of a Serializer prototype connected to a De-serializer prototype over STP or Coax, possibly including one or more connectors, in presence of channel loss/attenuation/reflection, noise and other impairments including cross-talk, EMI etc.,

(4) micro architecting (including development of the golden C models) all the digital blocks, and collaborating with the RTL, Comm. Systems, FPGA and AFE teams to make sure the implementation of the various digital blocks, the interface blocks and the digital interface to the AFE including any digital control needed for the AFE and

(5) making the appropriate choice of the embedded processor (along with configurations and memory requirements) for implementing the modem state machine(s), message passing, control functions etc. as well as collaborating with the Comm. Systems team and the Firmware team to get these functions implemented on this processor.

Requirements :

Candidate preferably should have hands on experience with defining the project, architecture, specifications, micro architecting, supervision of architecture development, test plan, and analyzing lab measurements.

MS in Electrical Engineering with 20+ years of relevant industry experience in high speed wire-line communications PHY (e.g. xDSL or G.fast or Cable Modems (DOCSIS) or Gigabit Ethernet (1000 BASE-T/T1 or NBASE-T or 10G BASE-T or Automotive Ethernet (IEEE 802.3ch)) SoC architectures.

Exposure to FPD Link and/or GMSL line of products and, commonly used high speed SerDes is a plus, but not mandatory.

The Job will require the candidate to be a technical lead as well as manage a small group (over time) of chip architects and micro architects for developing the SoCs for Onsemi s Automotive SerDes. This will require leadership skills involving clear communication of expectations plus technical review and perform evaluation of the work. Job requires interaction with the RTL, DSP Firmware, Emulation/FPGA and, Systems Test teams as well as with the cross functional teams like Technical Marketing, Product Marketing, FAE etc. This Job also requires having a forward-looking vision regarding where the technology is going and provide adequate heads up to all the above teams regarding future SoC architecture requirements.


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