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Location

Bangalore | India

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Job description

Skills: AMS & wreal modeling, SV modeling and Testbench development, spectre/spice simulations, Basics of UVM, python and perl scripting

Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks

· Very Good experience in Analog Mixed Signal verification simulation tools

· Good experience in System Verilog, UVM methodologies

· Able to train the team members and guide them to the solutions for problems

· Good experience in creating the AMS Verification environment and able to create AMS Verification environment from scratch.

· Good experience in Gate level netlist simulation

· Experience in Python, Perl, Shell scripting is added advantage.

· Good communication and documentation skills

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Job tags

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Salary