---

---

Location

Bangalore | India

---

Job description

• Develop Synopsys Silicon Lifecycle Management tool flows, methodologies, and automation to meet test requirements for High volume manufacturing, Production, In-ramp, In-Field etc., that includes Memory BIST, Logic BIST, Scan compression, Boundary scan, IEEE1687, IEEE1838, Monitors, Sensors, HSAT etc.
• Create Specification and Implementation plans using Industry Standard Synopsys Test tools - TestMAX and develop methodologies for IPs and PHYs.
• Enable seamless integration of cutting-edge technologies into Synopsys Test tools Platforms.
• Involve in Development of Reference Flows for our renowned test solutions - Integrate and Verify DFT logic design, SLM IPs at Block and SOC level considering improving ATPG QoR and minimizing Performance-Power-Area QoR.
• Provide sign-off timing and Synthesis constraints for all DFT and SLM Components generated by Synopsys Test tools for all DFT modes.
• Generate high quality Manufacturing, Characterization patterns and assist in Diagnosis and debug on ATE and In-System testing.

Key Qualifications

BE / MTech in Electrical Engineering or Computer Engineering.

Preferred Experience

• 12+ years experience working in VLSI and DFx Domains
• Expert in VLSI Designs, DFT Domain knowledge, Sensors and Monitors functional behavior, Security, Safety - Scan, Memory Testing, Logic Testing, Static Timing, Logic Synthesis, Floor planning, Placement and Routing
• Excellent communication and presentations skills.
• Listening, understanding, and interpreting the design requirements are a key part of the communications skill set.
• Good technical problem-solving skills is a must
• Have experience in driving the projects end2end, mentoring the teams and have exposure working with global teams

---

Job tags

---

---

Salary