Silicon Validation Engineer, Memory Subsystems
Location
Bangalore | India
Job description
Minimum qualifications:
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
- 3 years of experience with the pre-silicon or post-silicon domain.
Preferred qualifications:
- Experience with CPU and cache exposure in pre-silicon environments.
- Experience executing tests on emulation platforms or Field-Programmable Gate Array (FPGA).
- Experience with complex system debugs, embedded operating systems, or bare metal programming.
- Experience with Joint Test Action Group (JTAG) debuggers (e.g. Lauterbatch).
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Work with Architecture, Design, and Product teams to understand requirements for memory subsystem validation (e.g., DDRPHY, Memory Controller, DRAM).
- Understand the design and develop/execute validation tests to establish functionality of new design on emulation platform for tapeout for DDRPHY and DRAM subsystems.
- Drive the post-silicon bringup and validation activities for the IP block.
- Develop various post-silicon validation, debug, and margin tools. Debug failures with cross-functional teams for Emulation, Silicon, Boards, Software, and Manufacturing.
- Review schematics and layouts of silicon evaluation boards and customer boards. Provide regular updates about emulation/silicon health to Platform, Software, and Volume Manufacturing teams.
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