Cognitive Design Technology Pvt Ltd
Location
Bangalore | India
Job description
Minimum 3-5 + years Experience in Physical Design engineering Experience serving as Senior physical design engineer or SOC or block coordinator or top level integrator in TSMC 12m or 16nm process and beyond required Experience running Synthesis-to-GDS ready flows, advanced timing flows and power-driven PD flows (e.g., multi-domain designs with a UPF/CPF flow) , Strong expertise on low power methodology in FinFET design, shared NWELL methodology is highly desirable Experience in Cadence design flow is highly desirable/flat and hierarchical flow/STA timing signify/PV and PI signoff/ multi-bit flops/Retension flops Job Type: Full-time
Benefits: Health insurance Provident Fund Supplemental pay types: Performance bonus Yearly bonus Ability to commute/relocate: Bengaluru, Karnataka: Reliably commute or planning to relocate before starting work (Preferred) Experience: total work: 3-5 years (Preferred)Job tags
Salary
