Master Thesis Redundant OnChip and OnPackage Interconnect for FaultTolerant Neural Network Computation remote possible

Location

Magstadt | Germany

Job description

Company Description

At Bosch, we shape the future by inventing high-quality technologies and services that spark enthusiasm and enrich people’s lives. Our promise to our associates is rock-solid: we grow together, we enjoy our work, and we inspire each other. Join in and feel the difference.

The Robert Bosch GmbHis looking forward to your application!

Job Description

Automotive computing is rapidly facing challenges where extreme compute performance requirements meet equally challenging safety requirements. Especially, neural networks (NNs), which are heavily used in automated driving at different stages. Not only must their enormous performance requirements be met under embedded constraints, but also safety, which includes not only error detection, but also at least partial maintenance of computations in the event of hardware failures.

In this thesis, safety measures shall be developed extending on-chip interconnect domain where topologies and RTL extensions shall be designed to uphold on-chip compute in the presence of faults. An existing interconnect currently used in our platform generation shall be therefore adapted towards path reconfiguration, error detection/correction and redundancy.

Join our international team of researchers and engineers and contribute with your thesis to future safety mechanisms for automated driving applications!

• You will conduct literature research on state-of-the-art on-chip interconnect redundancy.
• Support our team by evaluating related on on-chip/-package interconnect towards their feasibility to uphold communication in the presence of faults.
• You will design and/or extend (at least prototypically) architectural RTL blocks to keep up interconnect availability and reconfigure communication paths in the presence of faults.
• Where possible, you will demonstrate that your measures can be automatically applied on existing designs by extending our Python-based auto-generation framework.
• Last but not least you will show the feasibility of your designs and measure induced overhead (e.g. on-chip area impact), document and discuss the results.

Qualifications

• Education: Master studies in the field of Electrical Engineering, Computer Science or comparable
• Experience and Knowledge: strong experience in RTL design, (System)Verilog or another VHDL; expertise in C++, SystemC or Python as well as Linux and LaTeX
• Personality and Working Practice: independent and structured
• Enthusiasm : keen on diving deep technically, open to x-functional safety challenges
• Languages: English or German

Additional Information

Start: according to prior agreement
Duration: 6 months

You want to work flexibly from your home in Germany or prefer working at the Bosch location in Renningen?
For positions with the addition “remote possible”, you can agree on the appropriate collaboration for your task together with your manager and your team within the framework of Smart Work.

Requirement for this thesis is the enrollment at university. Please attach your CV, transcript of records, examination regulations and if indicated a valid work and residence permit.

Diversity and inclusion are not just trends for us but are firmly anchored in our corporate culture. Therefore, we welcome all applications, regardless of gender, age, disability, religion, ethnic origin or sexual identity.

Need further information about the job?
Jan Micha Borrmann (Business Department)
+49 172 7359362

#LI-DNI

Summary

• Type: Full-time
• Function: Engineering

Job tags

Salary