Job Description and Requirements
Principal Digital Engineer
Seeking a highly motivated and innovative experienced Digital Design Engineer with knowledge of ASIC development flow. The candidate will be working as part of a highly experienced ...
Job Description and Requirements
Synopsys, a leading technology company in the semiconductor industry, is seeking a highly skilled and experienced Staff A&MS Layout Design Engineer to join our dynamic team. As a Staff A&MS Layout Design Engine...
Our team has an immediate 12-month contract opening for an Engineer. Responsibilities:
Assist in designing, simulating, and evaluating various coding modulation schemes for our next-generation optical modem
Contribute to modifying and updatin...
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Senior Software Engineer
JOB TYPE: W2, Contract, Hybrid
LOCATION: KANATA, ON
JOB SUMMARY FOR Senior Software Engineer:
We are looking for an Android HMI developer with an emphasis on the application (Kotlin) layer and some experience wi...
Software Engineer posted 16 hours ago
JOB TYPE: W2, Hybrid
LOCATION: KANATA, ON
JOB SUMMARY FOR Software Engineer:
We are seeking to hire a person with embedded software development expertise. This team develops control algorithms and p...
Job Description and Requirements
Seeking a highly motivated and innovative mixed signal AMS co-simulation verification engineer with strong theoretical and practical background in high-speed data recovery circuits. Working as part of a highly e...
Job Description and Requirements
Analog Design, Staff Engineer
In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a growing analog and mixed signal R&D team developing...
Job Description and Requirements
ASIC Physical Design Methodology Engineer.
We are looking for an ASIC Physical Design Methodology Engineer to join the Digital Methodology Core Team. In this position, you will design, develop, and manage inf...
Staff Digital Verification Engineer
Job Description and Requirements
Staff Digital Verification Engineer
Responsibilities
Define verification plans and build verification environments for IP level designs using System Verilog with UVM.
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