Responsibilities include but not limited to the following:
Take the role of technical lead for the Test Environment and achieve high quality verification with a small team of verification engineers
Understanding Standard Specifications/functional specifications/ feature enhancements for the product to create and execute detailed verification plans for the DDR PHY Training Firmware
Implement test bench infrastructure and creation of test cases
Research emerging technologies in the field of virtual prototyping and emulation to drive continuous improvement for team efficiency and quality.
Lead and contribute to technical reviews
Solve complex / abstract problems
The role offers ample scope to mentor junior engineers to enhance ones’ leadership skills
Key Qualifications
BSEE with 6+ years of relevant experience in Electrical Engineering or Computer Engineering or other relevant field of study.
Preferred Experience:
Leadership skills with remote teams.
The ability to work independently, precisely and to drive innovation.
Proficient in SystemVerilog and UVM along with an understanding of C++.
Object oriented coding and verification solutions for productivity, performance, and throughput.
Experience of techniques such as assertion verification, coverage analysis and System Verilog for protocol-oriented performance analysis and debug.
Regression systems, build systems, source code control tools.
Development utilities and languages skills such as Python, SQL, JavaScript, etc.
Experience with virtual prototyping and/or emulation is a plus.
Knowledge of LPDDR interfaces would be a strong asset.
